As known, a problem encountered in digital transmission between distant points (e.g. between a satellite and an earth staton) or between near points (e.g. between a telephone exchange and a subscriber) is the receiver synchronization to the transmitter.
This operation is required of every receiving apparatus to correctly estimate the electrical levels of the received signal.
In fact the optimum sampling instant can be determined only by knowing signalling period boundaries, i.e. the period in which a single elementary information is transmitted.
Said instant is the instant at which the effects of noise and distortions introduced by the transmission channel are minimum, and hence the probability of a correct estimate of the received symbol is at its maximum.
This problem is resovled by the use of devices which automatically correct frequency differences and cause the signalling period of the received signal to coincide with that of a locally-generated signal, used as frequency reference.
In this case, the information on the signalling period of the transmitted signal is extracted from the received data flow by the receiver, overcoming the distortions introduced by the channel and frequency and phase differences between remote and local clock generators.
Once this information has been obtained, a signal, duly-positioned within the signalling period, can be generated to estimate the logic level of received signal.
Up to now the device generally used has been the phase-locked loop (or PLL), consisting of a phase comparator, a loop filter and a controlled oscillator (e.g. a VCO=voltage-controlled oscillator).
The phase comparator determines phase differences between the input signals and the local reference; the detected phase error signal is filtered, so as to reduce noise, and is sent to the controlled oscillator, which accordingly adjusts the frequency of the locally-generated signal.
In the past, these three components were implemented by analog techniques.
With the coming of digital techniques a progressive introduction of digital devices into PLL has been noticed.
First a sample-and-hold circuit was introduced after the filter, so as to permit the use of a digital VCO.
Afterwards the phase comparator and the filter, were rendered digital, thus implementing an all-digital PL, the socalled DPLL (digital phase-locked loop).
In a type of embodiment of DPLL, the pase error is determined by evaluating the lead or the lag of the signal emitted by the local generator in comparison with the emitted by the remote generator. This estimate is effected whenever the received signal traverses predetermined electrical thresholds.
The error signal, proportional in amplitude and sign to the phase difference, is filtered and used to perform the necessary corrections of the local generator.
One of the main problems presented by these types of DPLL is that due to synchronism loss when there is a low content of level transitions in the received signal, more particularly when there are long sequences of equal symbols or when the same signal is absent on the line for short periods.
That entails a delay in the detection of the optimal sampling instant at the arrival of the successive valid signals, owing to the time necessary to correctly extract the synchronism signal.
These disadvantages are overcome by use of line encoders, which increase the number of transitions, with consequent increase in the information content of the phase behavior.
However, a high number of transitions entails the necessity of accurately filtering the estimated error, in order to obtain a reliable value of the signal to be used for correcting the local generator. That allows jitter effect minimization. However, the filtering operation requires complex devices and algorithms, to the detriment of convergence speed and integration ease.
Another way of overcoming the disadvantage of synchronism loss is that provided for digital telephone exchanges in connection with higher hierarchical level exchanges.
This method, described in "Synchronizaton system for telephone and data networks" by R. W. Slabon et al, ISS81 pages 41.B 3.1-6, consists of storing the information on frequency difference between a remote and a local clock and using it in case of malfunctioning. The information and its management require, however, the use of a large-sized processor.